Chip performance is not all about increasing clock speed, and creating an integrated solution is not all about cramming more features into a device. Too often the intention to create an elegant integrated system, to add a sensor to a radio or voice control at the user interface, becomes an exercise in bolting together modules – none of which were quite what the design required.
These approaches are the blunt tools for making products do more. But blunt tools tend to fail at shaping the details, or working well for nuanced use-cases. Before you know it, the design becomes a Frankenstein creation that fails to meet the power, size, and user experience intended. So with Halloween today, how can you avoid your next integrated system becoming a horror story?
With an increasing demand for always-on applications and extended battery life, think here of smart watches, fitness trackers or the Amazon Echo and similar listening devices that have arrived over the last year, blunt approaches to integrated systems are just not good enough. Application Specific Integrated Circuits (ASICs) are a great tool to boost performance, reduce power consumption, and leverage silicon processes in the most efficient way for a computationally complex task or set of tasks.
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Big silicon manufacturers have realized this, and in the world of mobile devices this is being exploited to great effect. Your mobile phone has at least a dozen different processors and accelerators, most of which are highly specialized to their tasks. Many of those sit in the core application processor System on a Chip (SoC), but others are part of the wireless and cellular peripherals, screen controllers, sensor fusion, and power management modules.
There are associated costs, risks, and timescales involved with developing an ASIC, which have traditionally been perceived as prohibitive for all but the largest players on the market. So what can you do if your products’ functionality is not defined by an established radio standard, or if your volumes are much lower than a modern mobile phone? Furthermore, if the ASIC is created by just bolting together IP blocks it can end up being just a smaller version of clumsy design. Is it possible to create ASIC solutions that are truly balanced to provide bespoke functionality, at low power, whilst maintaining flexibility? Furthermore, can that be done without incurring a multiyear, ten million dollar development?
The Sapphyre technology from Cambridge Consultants is a development platform for accelerated creation of custom DSP cores, that can be used for silicon IP blocks, FPGA solutions and custom ASICs. Sapphyre has a proven track record of single spin silicon deliveries and is running in hundreds of millions of battery powered devices worldwide, from wireless computer peripherals to satellite phones and modems, providing designs which can truly balance functionality and flexibility in low power products.
Sapphyre builds on over 30 years of custom digital and mixed signal integrated circuit design experience at Cambridge Consultants. But we don’t stand still – we are constantly evolving and improving our processes. Sapphyre is the pinnacle of that evolution – it is our most efficient, best performing, lowest cost, and most flexible technology.
In a series of blog posts over the coming weeks my colleagues and I will take you through some of the unique points that make Sapphyre the ideal platform to quickly develop low power, balanced ASIC solutions. We’ll explain how some of the techniques used in Sapphyre help to reduce power, memory, development time and risk, and provide a straight forward path to ASIC with an elegant balanced design that prevents your next integrated system from being a monster than comes back to haunt you.